Session:

Future electronic systems will continue to rely on, and increasingly benefit from, the advances in semiconductor technology as they have had for more than five decades.

Three dimensional integration is one of the major technology directions for integrated circuits. A key technology direction is CMOS + X, where X can be memory, photonics, spintronics, power electronics, nanomechanics, sensors and actuators, RF/mm-wave, and even quantum computing. Nanosystems of 3D integrated “X” technology (N3XT) is a key concept at the chip level. We must also go beyond a single chip from a wafer and focus on integrating chips into systems using MOSAIC (MOnolithic Stacked Assembled IC).

MOSAIC systems may enable a wide spectrum of compute throughput, energy efficiency, and memory capacity to be simultaneously realized within the same hardware to support emerging workloads for edge machine intelligence. Accelerators addressing a variety of workloads can be reconfigured for application-level flexibility. Intelligently partitioning and co-designing the logic, memory, and interconnect with new design space made possible by CMOS + X can be key to such new capability.

I will give an overview of the new materials, device technologies, and design concepts that may need to be developed to realize this vision.

Acknowledgments: Prof. Haitong Li (Purdue University), Prof. Subhasish Mitra (Stanford University), Prof. Priyanka Raina (Stanford University)

H.S. Philip Wong

Appearances