Single-walled carbon nanotubes (SWCNTs) have been widely recognized over the last two decades as promising candidates for next-generation field-effect transistors (FETs). Recent work performed by Franklin et al. at IBM suggests that aggressively scaled and pitched arrays of SWCNTs are expected to outperform silicon in logic circuits, which could enable next-generation electronic technologies with low power consumption and high performance.[1] Realizing the full potential of SWCNTs for these applications, however, has been challenging and many limitations that persist require further advances in the materials science of nanotube sorting, alignment, and assembly. Recently, we have made such advances by employing polyfluorene polymer wrappers to selectively isolate large-diameter semiconducting-SWCNTs to greater than 99.9% purity and controllably depositing the SWCNTs into aligned arrays using a novel method that we have pioneered titled “dose-controlled, floating evaporative self-assembly”.[2, 3] Using these methods, we have recently demonstrated[4] FETs with unprecedented, high on-state conductance with simultaneous high on/off ratio. At a SWCNT packing density of 42 nanotubes/μm and a channel length of 230 nm and width of 4 µm, we demonstrate champion SWCNT FETs with on-state conductance of 242 μS/μm and on/off ratio of 7x105. Average on-state conductance and on/off ratio for 13 devices with lengths ranging from 160-240 nm are 193±35 μS/μm and 3x105±2.5x105, respectively. At a channel length of 1 µm, we demonstrate on-state conductance of 112 μS/μm and on/off ratio of 2x107. Average on-state conductance and on/off ratios at this channel length are 95±10 μS/μm and 5x106±7x106, respectively. Our average devices achieve 1400x greater conductance modulation than the previous state-of-the-art, at comparable on-conductance of ~200 µS/µm. Likewise, our average devices achieve 30-100x greater on-conductance, at comparable conductance modulation of 105-106.

These promising results are due to the exceptionally high purity and alignment of the SWCNTs in the channel. For example, we have measured 4071 SWCNTs in 400 nm channel length FETs and 1612 SWCNTs in <240 nm channel length FETs and found no metallic SWCNTs. A transmission line method indicates that the on-conductance is limited by a contact resistance of 80 k? per nanotube per palladium electrode. By improving upon this contact resistance and optimizing the nanotube packing density, we believe that our methods, which are scalable to large areas, are a promising pathway towards aggressively scaled and pitched SWCNTs for next-generation microelectronics and thin-film transistor applications.

1. Franklin et al. Nano Lett 12(2) 758 (2012).

2. Brady et al. APL 104 083107 (2014).

3. Joo et al. Langmuir 30(12) 3460 (2014).

4. Brady, G.J.; Joo, Y.; Wu, M.; Gopalan, P.; Arnold, M.S., In preparation. (2014).

Gerald Brady

University of Wisconsin-Madison

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